PPSC Computer Science Topic 17 MCQ's Test Preparation

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MCQ's Test For PPSC Computer Science Topic 17 Microprocessor And Assembly Language

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PPSC Computer Science Topic 17 Microprocessor And Assembly Language

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Question # 1

Which is the great importance's in modular programming

Question # 2

Alpha AXP is developed by

Question # 3

A nibble can be represented in the from of.

Question # 4

PR stand for

Question # 5

CAD stand for.

Question # 6

The processor uses the stack to keep track of where the items are stored on it this by using the.

Question # 7

Which type of RAM need regular referred.

Question # 8

T1 is the time taken for the stage and there are n stages in the.

Question # 9

The _____ ddress of a memory is a 20 bit address for the 8086 microprocessor.

Question # 10

The growth of medium scale integration in.

Question # 11

How many type of cache memory

Question # 12

The amount of information which can be plead at one time in the cache memory is called.

Question # 13

Which is 16 bit microprocessor .

Question # 14

Which is the main feature of 8085

Question # 15

L2 cache memory is places at __________

Question # 16

BIU stand for

Question # 17

A fourth bit called the

Question # 18

The information on the data bus in transferred to the ______ register.

Question # 19

The CPU removes the __________ signal to complete the memory write operation.

Question # 20

How many types of classification of processor based on register section.

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PPSC ComputerScience Chapter 17 Important MCQ's

Sr.# Question Answer
1 The standard I/O is also called.
A. isolated I/O
B. Parallel I/O
C. Both a and b
D. None
2 What is the period of 3 generation.
A. 1979-1981
B. 1979-1980
C. 1978-1979
D. 1978-1986
3 Inc case of direct mapped cache lower order line address bits are used the access the
A. RAM
B. ROM
C. Directory
D. HDD
4 Which register is connected to the memory by way of the address bus.
A. MAR
B. MDR
C. SAM
D. None
5 SBA stand for
A. Segment bus address
B. Segment not address
C. Segment base address
D. Segment byte address
6 The upper red arrow show that CPU sends out the control signals _____ and ____ indicate the data is read from the memory.
A. Memory request
B. Read
C. Both a and b
D. None
7 Cache can be controlled.
A. 16 KB - 2MB
B. 17 KB - 2MB
C. 18 KB - 2 MB
D. 19 KB - 2MB
8 VAM sand for
A. Valid memory address
B. Virtual memory address
C. variable memory address
D. None
9 Period of fifth generation
A. 1974 -1978
B. 1979-1980
C. 1981-1985
D. 1995 till date
10 Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU.
A. Control bus
B. Data bus
C. Address bus
D. None

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