PPSC Computer Science Topic 17 MCQ's Test Preparation

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MCQ's Test For PPSC Computer Science Topic 17 Microprocessor And Assembly Language

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PPSC Computer Science Topic 17 Microprocessor And Assembly Language

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Question # 1

How many bit of instruction on our simple computer consist of one

Question # 2

L2 cache memory is places at __________

Question # 3

the CPU Sends out a _______ signal to indicate that valid data is available on the data bus.

Question # 4

Secondary memory can store.

Question # 5

Which mode is used for single handshake in 8255

Question # 6

CISC stand for.

Question # 7

_______ is the most commonly used cache controller with a number of processor sets.

Question # 8

Which flag are used to record specific characteristics of arithmetic and logical instructions.

Question # 9

Which are used DMA controllers with 8085/8086 microprocessor.

Question # 10

Which are the categorized of Flag

Question # 11

Motorola introduced _____ processor.

Question # 12

_______ is the most important segment and it contains the actual assembly language instruction to be executed by the microprocessor.

Question # 13

Causing a flag to became 0 is called.

Question # 14

ED stand for

Question # 15

Micro processor is fabricated on single chip using.

Question # 16

A computer which has the microprocessor as ________ is called as a micro computer.

Question # 17

How many bit stored by status register

Question # 18

How many types of primary register.

Question # 19

Pentium pro can address______ of memory.

Question # 20

The ____________ was very successful in the calculator market at that time.

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Sr.# Question Answer
1 PC's use_______ based on this architecture.
A. CPU
B. ALU
C. MU
D. None
2 LRB stand for
A. Line ready buffers
B. Line root buffers
C. Line read buffers
D. Line right buffers
3 Which is used to store critical pieces of data during subroutines and interrupts.
A. Stack
B. Queue
C. Accumulator
D. Data register
4 Which programmable timer is used to generate timing signal
A. 8255
B. 8254
C. 8251
D. 8259
5 Which is the main feature of 8085
A. Internal clock generator
B. Internal system controller
C. Higher clock frequency
D. All of these
6 DMA Stand for
A. Direct memory access
B. Direct memory allocation
C. Data memory access
D. Data memory allocation
7 Which is the architecture of microprocessor.
A. CISC
B. RISC
C. All of these
D. None
8 Cache is usually the ______ of memory access by the microprocessor.
A. First level
B. Second level
C. Third level
D. Fourth level
9 PR stand for
A. Priority register
B. Priority resolver
C. Priority request
D. None
10 The register can be divided are.
A. 3
B. 4
C. 5
D. 6
11 NMI stand for
A. Non mask able interrupt
B. Non mistake interrupt
C. Both a and b
D. None
12 Second level is a cache on the
A. Main memory
B. RAM
C. Both a and b
D. None
13 The area of memory with addresses near zero are called.
A. High memory
B. Mid memory
C. Memory
D. Low memory
14 Which RAM is created using MOS transistors.
A. Dynamic RAM
B. Static RAM
C. Permanent RAM
D. SD RAM
15 Which is the microprocessor launched by Rock well international.
A. RPS-4
B. RPS-8
C. RPS-8
D. All of these
16 The structure of the stack is _______ type structure.
A. First in last out
B. Last in last out
C. Both a and b
D. None
17 EU stand for
A. Execution unit
B. Execute unit
C. Exchange unit
D. None
18 ICW stand for
A. interrupt command words
B. Interrupt command write
C. Initialization command words
D. Initialization command write
19 PA stand for
A. Project address
B. Physical address
C. Pin address
D. Pointer address
20 The cache usually gets its data from the ______ whenever the instruction or data is required by the CPU.
A. Main memory
B. Case memory
C. Cache memory
D. All of these

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