PPSC Computer Science Topic 17 MCQ's Test Preparation

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MCQ's Test For PPSC Computer Science Topic 17 Microprocessor And Assembly Language

Try The MCQ's Test For PPSC Computer Science Topic 17 Microprocessor And Assembly Language

  • Total Questions20

  • Time Allowed20

PPSC Computer Science Topic 17 Microprocessor And Assembly Language

00:00
Question # 1

_____ was more common year

Question # 2

OCW stand for

Question # 3

Pentium III processor is released in the form of.

Question # 4

RISC stand for.

Question # 5

How many speed of 8088 , 8085 , 8086 microprocessor.

Question # 6

How many ways fo transferring data between the microprocessor and a physical I/O device.

Question # 7

The problems of bus confit and spares address distribution are eliminated by the use of ___ address technique.

Question # 8

The processer of knowing the status of device and transferring the data with matching speeds is called.

Question # 9

Which provided the current.

Question # 10

DS stand for

Question # 11

VAM sand for

Question # 12

Name of typical dedicated regtister.

Question # 13

The offset of a particular segment varies from_______

Question # 14

EB stand for

Question # 15

Which is widely used in interrupt controller with a number of microprocessor.

Question # 16

Which microprocessor to read an item from memory.

Question # 17

LRB stand for

Question # 18

Who works as cache on the variable.

Question # 19

The standard I/O is also called.

Question # 20

VGA stands for

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Sr. # Question Answer
1 INT stand for

A. Input

B. Interrupt

C.Both a and b

D. None

2 How many types of addressing in memory.

A. Logical address

B. Physical address

C.Both a and b

D. None

3 Third generation micro processor is dominated by _______ micro processor.

A. 8 bit

B. 4 bit

C.16 bit

D. 64 bit

4 Which storage technique does not decoding circuit.

A. Linear decoding

B. Fully decoding

C.partially

D. None

5 Which is the microprocessor launch by Fairchild company

A. F-6

B. F-8

C.Both a and b

D. None

6 DIP stand for

A. Deal inline package

B. Dual inline package

C.Direct inline package

D. Digital inline package

7 Cache can be controlled.

A. 16 KB - 2MB

B. 17 KB - 2MB

C.18 KB - 2 MB

D. 19 KB - 2MB

8 Alpha AXP is developed by

A. DEC

B. IBM

C.Motorola

D. Intel

9 The beginning of very efficient ______ microprocessor in second generation.

A. 4-bit

B. 8-bit

C.16 -bit

D. 64 -bit

10 Which Bus connects CPU and level 2 cache

A. Rear side bus

B. Front side bus

C.Memory side bus

D. None

11 Which is the components of computer

A. System bus

B. CPU

C.Memory unit

D. All these

12 Which is the part of memory unit

A. Processor memory

B. Main memory

C.Secondary memory

D. All of these

13 WA Stand for

A. Write allocate

B. Wrote allocate

C.Way allocate

D. Word allocate

14 The external device is connected to a pin called the__ pin on the processor chip.

A. Interrupt

B. Transfer

C.Both

D. None

15 Which are used for port B in 8255

A. CPO-PC2

B. PC3-PC7

C.PC6-PC7

D. PC3-CP5

16 Which is the type of microcomputer memory

A. Processor memory

B. Primary memory

C.Secondary memory

D. All of these

17 MEMER and MEMW means

A. Memory read

B. Memory write

C.Both a and b

D. None

18 Which multiplex by ADC 0808/0809

A. 2:4

B. 3:8

C.4:16

D. None

19 Which is widely used in interrupt controller with a number of microprocessor.

A. 8251

B. 8254

C.8255

D. 8259

20 When CS_ the chip is not selected at all hence D7 to D0 are driven to high impendence state.

A. High

B. Low

C.Medium

D. Stand by

Test Questions

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