VU CS-302 Online Test Preparation

MCQ's Test For CS-302 Quiz Preparation Virtual University

Try The MCQ's Test For CS-302 Quiz Preparation Virtual University

  • Total Questions10

  • Time Allowed10

Start Test Download PDF

CS-302 Quiz Preparation Virtual University

00:00
Question # 1

The output of the expression F=A.B.C will be Logic ________ when A=1, B=0, C=1

Question # 2

In the following statement Z PIN 20 ISTYPE „reg.invert‟; The keyword “reg.invert” indicates ________

Question # 3

The address from which the data is read, is provided by _______

Question # 4

The divide-by-60 counter in digital clock is implemented by using two cascading counters

Question # 5

Caveman number system is Base ______ number system

Question # 6

A flip-flop is connected to +5 volts and it draws 5 mA of current during its operation, the power dissipation of the flip-flop is

Question # 7

The design and implementation of synchronous counters start from _________

Question # 8

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series

Question # 9

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

Question # 10

A decade counter is __________.

Submit

Prepare Complete Set Wise CS-302 Quiz Preparation Virtual University MCQs Online With Answers


Topic Test

00:00
Submit

Top Scorers Of CS-302 Quiz Preparation Virtual University MCQ`s Test

  • I
    Ifra Akram 26 - Feb - 2023 00 Min 10 Sec 10/10
  • S
    Syeda Hureem Fatima 12 - Jan - 2023 00 Min 28 Sec 10/10
  • H
    Hijab Fatima 02 - Jan - 2023 00 Min 28 Sec 10/10
  • A
    aayan ali 23 - Jul - 2024 01 Min 01 Sec 10/10
  • Q
    Qasim Butt 20 - Aug - 2023 01 Min 02 Sec 10/10
  • J
    Jehanzaib khalil 01 - Mar - 2023 01 Min 04 Sec 10/10
  • Q
    Qudsia fatima 05 - Mar - 2023 01 Min 06 Sec 10/10
  • Q
    Qkhan 28 - Feb - 2023 01 Min 06 Sec 10/10
  • F
    farzana 03 - Feb - 2024 01 Min 13 Sec 10/10
  • A
    apun ha 30 - Jul - 2024 02 Min 02 Sec 10/10
  • B
    Bushra Asad 23 - Feb - 2023 01 Min 49 Sec 9/10
  • R
    RANDOM GUYS 19 - Mar - 2023 03 Min 17 Sec 9/10
  • S
    Sidra Saleem 25 - May - 2023 03 Min 46 Sec 9/10
  • U
    Urooj Fatima 25 - May - 2023 01 Min 59 Sec 8/10
  • Z
    Zeeshan Tariq 13 - Mar - 2023 02 Min 14 Sec 8/10

Virtual University CS-302 Chapter 1 Important MCQ's

Sr.# Question Answer
1 If the FIFO Memory output is already filled with data then ________
A. It is locked; no data is allowed to enter
B. It is not locked; the new data overwrites the previous data.
C. Previous data is swapped out of memory and new data enters
D. None of given options
2 In a sequential circuit the next state is determined by ________ and _______
A. State variable, current state
B. Current state, flip-flop output
C. Current state and external input
D. Input and clock signal applied
3
________ is used to minimize the possible no. of states of a circuit.
A. State assignment
B. State reduction
C. Next state table
D. State diagram
4 For a positive edge-triggered J-K flip-flop with both J and K HIGH, the outputs will______ if the clock goes HIGH
A. toggle
B. set
C. reset
D. not change
5 ________ is used to minimize the possible no. of states of a circuit.
A. State assignment
B. State reduction
C. Next state table
D. State diagram
6 A GAL is essentially a ________.
A. Non-reprogrammable PAL
B. PAL that is programmed only by the manufacturer
C. Very large PAL
D. Reprogrammable PAL
7 If S=1 and R=0, then Q(t+1) = _________ for positive edge triggered flip-flop
A. 0
B. 1
C. Invalid
D. Input is invalid
8 The output of an XOR gate is zero (0) when __________ I) All the inputs are zero II) Any of the inputs is zero III) Any of the inputs is one IV) All the inputs are one.
A. I Only
B. IV Only
C. I and IV only
D. II and III only
9 Q2 :=Q1 OR X OR Q3 The above ABEL expression will be
A. Q2:= Q1 $ X $ Q3
B. Q2:= Q1 # X # Q3
C. Q2:= Q1 & X & Q3
D. Q2:= Q1 ! X ! Q3
10 Q2 :=Q1 OR X OR Q3
A. Q2:= Q1 $ X $ Q3
B. Q2:= Q1 # X # Q3
C. Q2:= Q1 & X & Q3
D. Q2:= Q1 ! X ! Q3

Test Questions