VU CS-302 Online Test Preparation

MCQ's Test For CS-302 Quiz Preparation Virtual University

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CS-302 Quiz Preparation Virtual University

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Question # 1

Consider an up/down counter that counts between 0 and 15, if external input(X) is “0” the counter counts upward (0000 to 1111) and if external input (X) is “1” the counter counts downward (1111 to 0000), now suppose that the present state is “1100” and X=1, the next state of the counter will be ___________

Question # 2

The simplest and most commonly used Decoders are the ______ Decoders

Question # 3

Stack is an acronym for_________

Question # 4

The basic building block for a logical circuit is _______

Question # 5

A flip-flop is connected to +5 volts and it draws 5 mA of current during its operation, the power dissipation of the flip-flop is

Question # 6

The alternate solution for a multiplexer and a register circuit is _________

Question # 7

The ANSI/IEEE Standard 754 defines a __________Single-Precision Floating Point format for binary numbers.

Question # 8

A logic circuit with an output consists of ________

Question # 9

3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series

Question # 10

What is the difference between a D latch and a D flip-flop?

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Virtual University CS-302 Chapter 1 Important MCQ's

Sr.# Question Answer
1 NOR gate is formed by connecting _________
A. OR Gate and then NOT Gate
B. NOT Gate and then OR Gate
C. AND Gate and then OR Gate
D. OR Gate and then AND Gate
2 The minimum time for which the input signal has to be maintained at the input of flip-flop is called ______ of the flip-flop.
A. Set-up time
B. Hold time
C. Pulse Interval time
D. Pulse Stability time
3 ___________ is one of the examples of synchronous inputs.
A. J-K input
B. EN input
C. Preset input (PRE)
D. Clear Input (CLR)
4 For a gated D-Latch if EN=1 and D=1 then Q(t+1) = _________
A. 0
B. 1
C. Q(t)
D. Invalid
5 Q2 :=Q1 OR X OR Q3 The above ABEL expression will be
A. Q2:= Q1 $ X $ Q3
B. Q2:= Q1 # X # Q3
C. Q2:= Q1 & X & Q3
D. Q2:= Q1 ! X ! Q3
6 3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series
A. Low switching speeds, high power dissipation
B. Fast switching speeds, high power dissipation
C. Fast switching speeds, very low power dissipation
D. Low switching speeds, very low power dissipation
7 The voltage gain of the Inverting Amplifier is given by the relation ________
A. Vout / Vin = - Rf / Ri
B. Vout / Rf = - Vin / Ri
C. Rf / Vin = - Ri / Vout
D. Rf / Vin = Ri / Vout
8 ________ is used to simplify the circuit that determines the next state.
A. State diagram
B. Next state table
C. State reduction
D. State assignment
9 Which is not characteristic of a shift register?
A. Serial in/parallel in
B. Serial in/parallel out
C. Parallel in/serial out
D. Parallel in/parallel out
10 Consider A=1,B=0,C=1. A, B and C represent the input of three bit NAND gate the output of the NAND gate will be _____
A. Zero
B. One
C. Undefined
D. No output as input is invalid

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