ECAT Pre Computer Science MCQ Test For Computer Chapter 5 With Answer

MCQ's Test For ECAT Computer Science Chapter 5 Boolean Algebra

Try The MCQ's Test For ECAT Computer Science Chapter 5 Boolean Algebra

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ECAT Computer Science Chapter 5 Boolean Algebra

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Question # 1

According to Idempotent law , x + y = __________

Question # 2

Logical multiplication refers to operation of.

Question # 3

The half adder circuit has

Question # 4

Boolean expression for NOR gate with two inputs x and y can be written as.

Question # 5

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Question # 6

An AND gate will function as OR if.

Question # 7

According to aborption law x+x.y=

Question # 8

Boolean algebra is.

Question # 9

According to Boolean algebra A+A+......+A is

Question # 10

The circuit that is used for parallel to serial conversion is

Question # 11

In Boolean algebra A.0 is

Question # 12

Which of the following function is referred as the complementary.?

Question # 13

Logical addition refers to operation of

Question # 14

If A and B are two 1-bit numbers, what logic gates will be required to test for A=B?

Question # 15

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ECAT Computer Sciences Chapter 5 Important MCQ's

Sr.# Question Answer
1 According to Idempotent law , x + y = __________
A. 1
B. 0
C. x
D. x . x
2 According to absorption law x. (x+y) =
A. x
B. y
C. 1+x
D. 1+y
3
Question Image
A. x + y
4 The number of inputs to full adder are
A. 1
B. 2
C. 3
D. 4
5 Boolean algebra use which of the following to represent arithmetic quantities.
A. decimal digits
B. exponents
C. binary bits
D. fractions
6 In a three input NAND gate, if all the inputs are 1, the output is.
A. 0
B. 1
C. 3
D. indeterminate
7 Odd parity of a word can be conveniently tested by.
A. OR gate
B. XOR gate
C. NOR gate
D. NAND gate
8 According to Boolean algebra x + 1 = ______________
A. 0
B. 1
C. x
9 NAND gates are preferred over others because these.
A. have lower fabrication area
B. can be used to make any gate
C. consume least elctronic power
D. provide maximum density in a chip
10 Logical multiplication refers to operation of.
A. OR gate
B. AND gate
C. NOT gate
D. inverter gater

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