Question # 1

Excess-8 code assigns _______ to “-8”

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1110

1100

1000

0000

"A + B = B + A" is __________

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Demorgan‟s Law

Distributive Law

Commutative Law

Associative Law

The divide-by-60 counter in digital clock is implemented by using two cascading counters:

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Mod-6, Mod-10

Mod-50, Mod-10

Mod-10, Mod-50

Mod-50, Mod-6

FIFO is an acronym for __________

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First In, First Out

Fly in, Fly Out

Fast in, Fast Out

None of given options

Stack is an acronym for_________

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FIFO memory

LIFO memory

Flash Memory

Bust Flash Memory

A Nibble consists of _____ bits

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2

8

4

16

A logic circuit with an output consists of ________

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two AND gates, two OR gates, two inverters

three AND gates, two OR gates, one inverter

two AND gates, one OR gate, two inverters

two AND gates, one OR gate

For a gated D-Latch if EN=1 and D=1 then Q(t+1) = _________

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0

1

Q(t)

Invalid

If the S and R inputs of the gated S-R latch are connected together using a ______gate then there is only a single input to the latch. The input is represented by D instead of S or R (A gated D-Latch)

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AND

OR

NOT

XOR

LUT is acronym for ________.

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Look Up Table

Local User Terminal

Least Upper Time Period

None of given options

The basic building block for a logical circuit is _______

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A Flip-Flop

A Logical Gate

An Adder

None of given options

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