Question # 1

A counter is implemented using three (3) flip-flops, possibly it will have ________ maximum output status

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3

7

8

15

The output of the expression F=A.B.C will be Logic ________ when A=1, B=0, C=1

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Undefined

One

Zero

No Output as input is invalid

The _____________ input overrides the ________ input

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Asynchronous, synchronous

Synchronous, asynchronous

Preset input (PRE), Clear input (CLR)

Clear input (CLR), Preset input (PRE)

In order to synchronize two devices that consume and produce data at different rates, we can use _________

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Read Only Memory

Fist In First Out Memory

Flash Memory

Fast Page Access Mode Memory

A Nibble consists of _____ bits

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2

8

4

16

A GAL is essentially a ________.

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Non-reprogrammable PAL

PAL that is programmed only by the manufacturer

Very large PAL

Reprogrammable PAL

A full-adder has a Cin = 0. What are the sum (<PRIVATE "TYPE=PICT;ALT=sigma"> ) and the carry (Cout) when A = 1 and B = 1?

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= 0, Cout = 0

= 0, Cout = 1

= 1, Cout = 0

= 1, Cout = 1

The process of converting the analogue signal into a digital representation (code) is known as ___________

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Strobing

Amplification

Quantization

Digitization

The alternate solution for a multiplexer and a register circuit is _________

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Parallel in / Serial out shift register

Serial in / Parallel out shift register

Parallel in / Parallel out shift register

Serial in / Serial Out shift register

____________ is said to occur when multiple internal variables change due to change in one input variable

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Clock Skew

Race condition

Hold delay

Hold and Wait

Stack is an acronym for _________

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FIFO memory

LIFO memory

Flash Memory

Bust Flash Memory

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