Question # 1

NOR gate is formed by connecting _________

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OR Gate and then NOT Gate

NOT Gate and then OR Gate

AND Gate and then OR Gate

OR Gate and then AND Gate

In asynchronous transmission when the transmission line is idle, _________

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It is set to logic low

Remains in previous state

It is set to logic high

State of transmission line is not used to start transmission

______ of a D/A converter is determined by comparing the actual output of a D/A converter with the expected output

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Resolution

Accuracy

Quantization

Missing Code

A full-adder has a Cin = 0. What are the sum (<PRIVATE "TYPE=PICT;ALT=sigma"> ) and the carry (Cout) when A = 1 and B = 1?

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= 0, Cout = 0

= 0, Cout = 1

= 1, Cout = 0

= 1, Cout = 1

For a gated D-Latch if EN=1 and D=1 then Q(t+1) = _________

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0

1

Q(t)

Invalid

A flip-flop is connected to +5 volts and it draws 5 mA of current during its operation, the power dissipation of the flip-flop is

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10 mW

25 mW

64 mW

1024

If an S-R latch has a 1 on the S input and a 0 on the R input and then the S input goes to 0, the latch will be

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set

reset

invalid

clear

A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register.

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1

2

4

8

The design and implementation of synchronous counters start from _________

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Truth table

k-map

state table

state diagram

(A + B)(A + B + C)(A + C) is an example of ______________

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Product of sum form

Sum of product form

Demorgans law

Associative law

________ is used to minimize the possible no. of states of a circuit.

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State assignment

State reduction

Next state table

State diagram

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