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CS-302 Quiz Preparation Virtual University MCQs With Answers
Question # 1
The power dissipation, PD, of a logic gate is the product of the
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dc supply voltage and the peak current
dc supply voltage and the average supply current
ac supply voltage and the peak current
ac supply voltage and the average supply current
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Question # 2
The divide-by-60 counter in digital clock is implemented by using two cascading counters
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Mod-6, Mod-10
Mod-50, Mod-10
Mod-10, Mod-50
Mod-50, Mod-6
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Question # 3
In asynchronous transmission when the transmission line is idle, _________
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It is set to logic low
It is set to logic high
Remains in previous state
State of transmission line is not used to start transmission
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Question # 4
In _______ the Q output of the last flip-flop of the shift register is connected to the data input of the first flipflop.
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Moore machine
Meally machine
Johnson counter
Ring counter
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Question # 5
5-bit Johnson counter sequences through ____ states
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7
10
32
25
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Question # 6
A logic circuit with an output consists of ________
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two AND gates, two OR gates, two inverters
three AND gates, two OR gates, one inverter
two AND gates, one OR gate, two inverters
two AND gates, one OR gate
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Question # 7
In a state diagram, the transition from a current state to the next state is determined by
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Current state and the inputs
Current state and outputs
Previous state and inputs
Previous state and outputs
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Question # 8
In ________ outputs depend only on the combination of current state and inputs.
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Mealy machine
Moore Machine
State Reduction table
State Assignment table
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Question # 9
For a gated D-Latch if EN=1 and D=1 then Q(t+1) = _________
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0
1
Q(t)
Invalid
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Question # 10
A Nibble consists of _____ bits
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2
8
4
16
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Question # 11
In asynchronous transmission when the transmission line is idle, _________
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It is set to logic low
It is set to logic high
Remains in previous state
State of transmission line is not used to start transmission
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