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CS-302 Quiz Preparation Virtual University MCQs With Answers
Question # 1
The alternate solution for a demultiplexer-register combination circuit is _________
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Parallel in / Serial out shift register
Serial in / Parallel out shift register
Parallel in / Parallel out shift register
Serial in / Serial Out shift register
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Question # 2
5-bit Johnson counter sequences through ____ states
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7
10
32
25
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Question # 3
The simplest and most commonly used Decoders are the ______ Decoders
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n to 2n
(n-1) to 2n
(n-1) to (2n-1)
n to 2n-1
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Question # 4
A transparent mode means _____________.
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The changes in the data at the inputs of the latch are seen at the output
The changes in the data at the inputs of the latch are not seen at the output
Propagation Delay is zero (Output is immediately changed when clock signal is applied)
Input Hold time is zero (no need to maintain input after clock transition)
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Question # 5
THE HOURS COUNTER IS IMPLEMENTED USING __________
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ONLY A SINGLE MOD-12 COUNTER IS REQUIRED
MOD-10 AND MOD-6 COUNTERS
MOD-10 AND MOD-2 COUNTERS
A SINGLE DECADE COUNTER AND A FLIP-FLOP
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Question # 6
DRAM stands for __________
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Dynamic RAM
Data RAM
Demoduler RAM
None of given options
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Question # 7
A synchronous decade counter will have _______ flip-flops.
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3
4
7
10
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Question # 8
The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
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A > B = 1, A < B = 0, A < B = 1
A > B = 0, A < B = 1, A = B = 0
A > B = 1, A < B = 0, A = B = 0
A > B = 0, A < B = 1, A = B = 1
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Question # 9
The storage cell in SRAM is
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a flip –flop
a capacitor
a fuse
a magnetic domain
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Question # 10
If an S-R latch has a 1 on the S input and a 0 on the R input and then the S input goes to 0, the latch will be
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set
reset
invalid
clear
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