Question # 1

SP stand for

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Stack pointer

Stack POP

Stack Push

None

How many parts of single address computer instruction.

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1

2

3

4

Which bus transfer singles from the CPU to external device and others that carry singles from external device to the CPU.

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Control bus

Data bus

Address bus

None

The CPU removes the __________ signal to complete the memory write operation.

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READ

WRITE

Both a and b

None

ISR stand for

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Interrupt service register

Input service register

In service register

All of these

How many generation of microprocessor.

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Three

Four

Five

Six

the growth of LSI technology on

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1994-1995

1971-1977

1972-1978

None

Which corporation decided to use 8088 microprocessor in personal computer.

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IBM

CRT

PMN

SPS

The pin configuration of 8086 is available in the.

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40 pin

50 pin

30 pin

20 pin

The memory system is said to be effective if the access time of the cache is close to the effective access time of the.

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ROM

RAM

HDD

Processor

______is usually the first level of memory access by the microprocessor.

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Cache memory

Data memory

Main memory

All of these

Which is the state of gate signal ft normal contains.

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Low

High

Un defined

None

How many architectural paradigms in microprocessor.

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2

3

4

6

Which is the microprocessor launched by Zilog.

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Z-2

Z-4

Z-8

Z-6

__________ Memory system which is discussed later can improve matters in this respect.

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Data memory

Cache memory

Memory

None

8254 counters can count in the

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Binary

Decimal

Hexadecimal

Both a and b

Which is 16 bit microprocessor .

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8088

8086

8085

All of these

Who works as cache on the variable.

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Memory

Pointer

Register

Segment

Which is widely used in interrupt controller with a number of microprocessor.

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8251

8254

8255

8259

Which is the main feature of 8085

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Internal clock generator

Internal system controller

Higher clock frequency

All of these

The fetch execute cycle is to use a system know as.

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Assembly line

Pipelining

Cache

None

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